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a
Switched Capacitor Voltage Converter with Regulated Output ADP3604*
FUNCTIONAL BLOCK DIAGRAM
CP+
1
FEATURES Fully Regulated Output High Output Current: 120 mA 50 mA Version (ADP3603) Is Also Available Outstanding Precision: 3% Output Accuracy Input Voltage Range: +4.5 V to +6.0 V Output Voltage: -3.0 V (Regulated) High Switching Frequency: 120 kHz (240 kHz Internal Oscillator) Shutdown Capability Small Outline 8-Pin SOIC Package APPLICATIONS Voltage Inverters Voltage Regulators Computer Peripherals and Add-On Cards Portable Instruments Battery Powered Devices Pagers and Radio Control Receivers Disk Drives Mobile Phones GENERAL DESCRIPTION
VIN
8
SPD S1
DNS S3 B
S ND S2 OSC CLOCK GEN
3
DNS S4
7 2
VOUT GND
CP-
SD 4
FEEDBACK CONTROL LOOP
5
VSENSE
PIN CONFIGURATION 8-Pin SOIC (SO-8)
CP+ 1 GND 2
8 VIN
7 VOUT TOP VIEW (Not to Scale) 6 NC CP- 3 5 VSENSE
ADP3604
The ADP3604 switched capacitor voltage converter provides a regulated output voltage with minimum voltage loss and requires a minimum number of external components. In addition, the ADP3604 does not require the use of an inductor. The ADP3604 provides up to 120 mA of output current with 3% output accuracy. The internal oscillator runs at 240 kHz nominal frequency which produces an output switching frequency of 120 kHz, allowing the use of small charge pump and filter capacitors. The ADP3604 is primarily designed for use as a high frequency negative voltage regulator/inverter. The output voltages of the ADP3604 can range from -1.2 V to -4.0 V, nominally -3.0 V. For other output voltages, contact the factory. The ADP3604 dissipates less than 350 mW of power and features fast shutdown mode capability (<5 ms) that also drops the quiescent current to 1.5 mA (typ). For a lower cost, 50 mA output current version, see the ADP3603.
SHUTDOWN 4
NC = NO CONNECT
VIN +4.5 - +6V
8 7
VOUT -3.0V C3 4.7F
C1 4.7F OFF ON
0
1
C2 4.7F SHUTDOWN
ADP3604
3 5 4 2
VSENSE
NOTE C2: SPRAGUE, 293D105X0010B2W C1, C3: TOKIN, 1E105ZY5UC205F
FOR
BEST PERFORMANCE 10F IS RECOMMENDED
*Patent pending.
Figure 1. Typical Application Circuit
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. (c) Analog Devices, Inc., 1996 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
ADP3604-SPECIFICATIONS (V
Parameter OPERATING SUPPLY RANGE SUPPLY CURRENT Shutdown Mode Symbol VS IS
IN
= 5.0 V @ TA = +25 C, CP = COUT = 10 F unless otherwise noted)
Min 4.5 Typ 5 2.9 3 1.5 1.6 -3.1 -3.1 -3.12 -3.2 -3.0 -3 -3 -3 0.9 1.5 8 25 55 120 120 Max 6 3.5 4 2.5 3.0 -2.91 -2.88 -2.85 -2.8 Units V mA mA mA mA V V V V mV/mA mV/mA mV mV kHz kHz V A V A ms ms
Condition
-40C < TA < +85C -40C < TA < +85C OUTPUT Output Voltage VO VO VO VO Load Regulation Output Resistance2 Output Ripple Voltage3 SWITCHING FREQUENCY SHUTDOWN Logic Input High Input Current Logic Input Low Input Current Turn-On-Time Turn-Off-Time VO/ IO RO VRIPPLE FS -40C < TA < +85C VIH IIH VIL IIL tON tOFF IO = 60 mA IO = 10 mA to 120 mA, 4.5 V < VIN < 6 V IO = 10 mA to 120 mA, 4.5 V < VIN < 6 V, 0C < TA < +70C IO = 10 mA to 120 mA, 4.5 V < VIN < 6 V, -40C < TA < +85C IO = 10 mA-60 mA IO = 10 mA-120 mA C1-C3 = 10 F, ILOAD = 80 mA C1-C3 = 10 F, ILOAD = 120 mA 100 96 2.4
135 140
1 0.4 Figure 1, IL = 120 mA Figure 1, IL = 120 mA 1 5 5
NOTES 1 Capacitors C1 and C2 used in the test circuit are 10 F with 0.1 ESR. Capacitors with higher ESR may reduce output voltage and efficiency. 2 Open-loop output resistance. 3 See Figure 1 conditions. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. Specifications subject to change without notice.
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
Input Voltage (V+ to GND, GND to OUT) . . . . . . . . . +7.5 V Output Short Circuit Protection . . . . . . . . . . . . . . . . . . . .1 sec Power Dissipation, SO-8 . . . . . . . . . . . . . . . . . . . . . . . 660 mW JA2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C/W JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41C/W Operating Temperature Range . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
NOTES 1 This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 JA is specified for worst case conditions with device soldered on a circuit board.
Pin 1 2 3 4
5
ORDERING GUIDE
6 7
Model ADP3604AR
Temperature Range -40C to +85C
Package Option* SO-8
8
*SO = Small Outline Package.
Function CP+, Pump Capacitor Positive Input. Ground. CP-, Pump Capacitor Negative Input. Shutdown, Logic Level Shutdown Pin. Application of a logic low to this pin will place the regulator in normal operation. The device will be put into shutdown mode with the shutdown pin pulled to VIN. In Shutdown mode the charge pump is turned off. Connect to ground for normal operation. VSENSE , Output Voltage Sense Line. This is used to improve load regulation performance by eliminating IR drop on the output traces. See application section for more detail. For normal operation, connect Pin 5 to VOUT (Pin 7). NC, No Internal Electrical Connection. VOUT, Output Pin. Regulated negative output voltage. Connect a low ESR capacitor between this pin and device GND. VIN, Positive Supply Input when 4.5 V VIN 6 V. Connect a low-ESR bypass capacitor between this pin and the device ground pin.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3604 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-2-
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ADP3604
130
OSCILLATOR FREQUENCY - kHz
3.5 3.0
SUPPLY CURRENT - mA
-2.9 VIN = 5V -2.92 OUTPUT VOLTAGE - V NORMAL MODE @ VIN = 5V -2.94 -2.96 -2.98 -3.00 -3.02 -3.04 -40 IL = 10mA 0 70 25 TEMPERATURE - C 85 IL = 60mA IL = 150mA IL = 120mA
2.5 2.0 1.5 1.0 0.5
120
SHUTDOWN MODE @ VIN = 5V
110 4.0
4.5
5.0 5.5 6.0 6.5 7.0 SUPPLY VOLTAGE - V
7.5
8.0
0 -40
0
25
70
85
TEMPERATURE - C
Figure 2. Oscillator Frequency vs. Supply Voltage
Figure 3. Supply Current vs. Temperature
Figure 4. Output Voltage vs. Temperature
126 OSCILLATOR FREQUENCY - kHz 124 122 120 VIN = 5V 118 116 114 112 -40
160 140 120
INPUT CURRENT - mA
70 60 50
VIN = 4.5V
VIN = 5.0V VIN = 6.0V
100 80 VIN = 5V 60 40 20
EFFICIENCY -%
40 30 20 10 0 10
0
25
70
85
0 10
30
TEMPERATURE - C
50 70 90 110 LOAD CURRENT - mA
130
150
30
50 70 90 110 LOAD CURRENT - mA
130
Figure 5. Oscillator Frequency vs. Temperature
Figure 6. Average Input Current vs. Load Current
Figure 7. Efficiency vs. Load Current and Input Voltage
5.0 4.5
SUPPLY CURRENT - mA
1V
AL MO DE
100 90
2mS
100 90
1V
2mS
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 4.5 5.0
SHUT
NO RM
0V
0V
0V
0V
DO
ODE WN M
10 0% 10 0%
5.5 6.0 6.5 7.0 SUPPLY VOLTAGE - V
7.5
8.0
Figure 8. Supply Current vs. Supply Voltage
Figure 9. Start-Up Under Full Load
Figure 10. Enable/Disable Time Under Full Load
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-3-
ADP3604
APPLICATION INFORMATION
The ADP3604 uses a charge pump to generate a negative output voltage from a positive input supply. To understand the operation of the ADP3604, a review of a basic switch capacitor building block is helpful.
A V1 B V2
overlap. S3 and S4 are turned ON during the second phase (see Figure 14) and charge stored in the pump capacitor is transferred to the output capacitor.
VIN S1 CP S2 S4 COUT S3
f
C1
C2
RL
VOUT
Figure 11. Basic Switch Capacitor Circuit
Figure 14. Switch Configuration Charging the Output Capacitor
In Figure 11, when the switch is in the A position, capacitor C1 will be charged to voltage V1. The total charge on C1 will be q1 = C1V1. The switch then moves to the B position, discharging C1 to voltage V2. After this discharge time, the charge on C1 is q2 = C1V2. The amount of charge transferred from the source, V1, to the output, V2 is: q = q1 - q2 = C1(V1 - V2) If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is: I = f q = fC1(V1 - V2) To obtain an equivalent resistance for the switched-capacitor network we can rewrite this equation in terms of voltage and impedance equivalence: I = (V1 - V2)/(1/fC1) = (V1 - V2)/REQUIV where REQUIV is defined as : REQUIV = 1/fC1 Figure 11 equivalent circuit now can be drawn as shown in Figure 12.
REQUIV V1 1 REQUIV = fC1 C2 RL V2
During the second phase, the positive terminal of the pump capacitor is connected to ground and the negative terminal is connected to the output resulting in a voltage inversion at the output terminal. Output regulation is done by adjusting the ON resistance of the S3 through the feedback control loop. The ADP3604 alternately charges CP to the input voltage when CP is switched in parallel with the input supply, and then transfers charge to COUT when CP is switched in parallel with COUT. Switching occurs at 120 kHz rate. During the time that CP is charging, the peak current is approximately 2 times the output current. During the time that CP is delivering charge to COUT, the supply current drops down to about 2 mA. An input supply bypass capacitor will supply part of the peak input current drawn by the ADP3604, and average out the current drawn from the supply. A minimum input supply bypass capacitor of 1 f, preferably a low ESR capacitor such as tantalum or multilayer ceramic chip capacitor, is recommended. A large capacitor may be desirable in some cases, for example when the input supply is connected to the ADP3604 through long leads, or when the pulse current drawn by the device might effect other circuitry through supply coupling. The output capacitor, COUT, is alternately charged to the CP voltage when CP is switched in parallel with COUT. The ESR of the COUT introduces steps in the VOUT waveform whenever the charge pump charges COUT. This tends to increase VOUT ripple. Ceramic or tantalum capacitors are recommended for COUT if minimum ripple is desired. The ADP3604 can operate with a range of capacitors from 1 f to 100 f and larger without any stability problems. However, all tested parameters are obtained using 10 f multilayer ceramic capacitors. In most applications, IR drops due to printed circuit board traces do not present a problem. In this case, VSENSE is tied to the output at a convenient pcb location not far from the VOUT. However, if a reduction in IR drops or improvement in load regulation is desired, the sense line can be used to monitor the output voltage at the load. To avoid excessive noise pickup, the VSENSE line should be as short as possible and away from any noisy line. While the exact values of the CIN and COUT are not critical, good quality, low ESR capacitors such as solid tantalum and multilayer ceramic capacitors are recommended to minimize voltage losses at high currents. For a given load current, factors affecting the output voltage performance in Figure 15 are: * Pump (C2) and the output (C3) capacitance * ESR of the C2 and C3
Figure 12. Basic Switch Capacitor Equivalent Circuit
THEORY OF OPERATION
A switched capacitor principle is used in the ADP3604 to generate a negative voltage from a positive input voltage. An on-board oscillator generates two phase clocks to control a switching network which transfers charge between the storage capacitors. The basic principle behind the voltage inversion scheme is illustrated in Figures 13 and 14.
VIN S1 CP S2 S4 COUT VOUT S3
Figure 13. Switch Configuration Charging the Pump Capacitor
During phase one, S1 and S2 are ON charging the pump capacitor to the input voltage. Before the next phase begins, S1 and S2 are turned OFF as well as S3 and S4 to prevent any -4-
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ADP3604
Since output current is supplied solely by the output capacitor C3 during one-half of the charge-pump cycle, peak-to-peak output ripple voltage is calculated by using the following formula:
ESR -
10 ALUMINUM
V RIPPLE =
IOUT +I (ESRC2 ) 2(F PUMP )(C2) OUT
1.0 CERAMIC
In Figure 15, output ripple voltage vs. capacitance and various ESR are shown.
120 OUT
TANTALUM 0.1 ORGANIC SEMIC
ORGANIC SEMIC TANTALUM
CERAMIC ALUMINUM
ESR C 140mA V
100
OUTPUT RIPPLE - mV
ADP3604
80
0.01 -50
0 50 TEMPERATURE - C
100
Figure 16. ESR vs. Temperature
60
Table I. Alternative Capacitor Technologies
40 150m 100m 20 50m
Type
0 20 40 60 80 100 120 CAPACITANCE - F 140 160 180
Life Fair
High Freq Fair
Temp Fair
Size Small
Cost Low
0
Aluminum Electrolytic Capacitor Multilayer Ceramic Capacitor Solid Tantalum Capacitor OS-CON Capacitor
Figure 15. Output Ripple Voltage (mV) vs. Capacitance and ESR
Long
Good
Poor
Fair
High
Note that as the capacitor value increases beyond the point where the dominant contribution to the output ripple is due to the ESR, no significant reduction in VOUT ripple is achieved by added capacitance. A low ESR capacitor has much greater impact on performance for C2 than C3 since current through C2 is twice the C3 current. There is a voltage drop across CP's ESR during the charge as well as during discharges. Therefore, the voltage drop due to C2 is about 4 times C2's ESR times the load current. The voltage drop generated by C2's ESR combined with the voltage drop due to the output source resistance, determines the maximum available VOUT, while C3's ESR affects the output voltage ripple. When selecting the capacitors, keep in mind that not all manufacturers guarantee capacitor ESR in the range required by the circuit. In general, the capacitor's ESR is inversely proportional to its physical size, so larger capacitance values and higher voltage ratings tend to reduce ESR. ESR is also a function of the operating frequency. When selecting a capacitor, make sure its value is rated at the circuit's operating frequency. The other factor affecting the capacitor's performance is temperature. If the circuit has to operate at temperatures significantly different than 25C, the capacitance and ESR values must be carefully selected to adequately compensate for the change. Various capacitor technologies offer improved performance over temperature, for example, certain tantalum capacitors provide good low-temperature ESR but at a higher cost. Figure 16 demonstrates the effect temperature has on various capacitors. ADP3604's high internal oscillator frequency permits the usage of smaller capacitance for both the pump and the output capacitors. REV. 0
Above Avg Above Avg
Avg
Avg
Avg
Avg
Good
Good
Good
Avg
The following is a partial list of manufacturers providing low ESR capacitors.
Table II. Recommended Capacitor Manufacturers
Manufacturer Sprague Sprague Nichicon Mallory TOKIN muRata
Capacitor 672D, 673D, 674D, 678D 675D, 173D, 199D PF & PL TDC & TDL MLCC GRM
Capacitor Type Aluminum Electrolytic Tantalum Aluminum Electrolytic Tantalum Multilayer Ceramic Multilayer Ceramic
EXTERNAL OUTPUT FILTERING
In applications requiring very low power supply ripple and noise, the circuit in Figure 18 provides low noise and ripple of less than 2% of the output voltage over the full load current and temperature.
-5-
ADP3604
The output current is supplied solely by the output capacitor C3 during one-half of the charge-pump cycle. This introduces a peak-to-peak ripple of:
Table IV. Recommended Components for Circuit in Figure 18
V RIPPLE =
IL + I x ESRC3 2 x120 kHz x C3 L
For a nominal F pump of 120 kHz (one-half the nominal 240 kHz oscillator frequency) and C3 = 10 F with an ESR of 0.15 , ripple voltage is approximately 60 mV with a 120 mA load current. Multilayer Ceramic Capacitors (MLCC) offer great performance and small size. Using multiple capacitors connected in parallel yields lower ESR and a potential saving in cost. Lighter loads require proportionally smaller capacitors. To reduce high frequency noise, bypass the output with a 0.1 F ceramic capacitor.
VIN +4.5 - +6V
8 7
Component C3 C1, C2, C4, C5 L1 L2
SHUTDOWN MODE
Manufacturer/Type Sprague, 293D475X0035D2W TOKIN, 1E475ZY5UC205F Coiltronics, CTX32CT-1R0 Coiltronics, CTX32CT-100
ADP3604's output can be turned off by utilizing the shutdown pin, Pin 4. Pulling the shutdown pin high to a TTL/CMOS logic compatible level will stop the internal oscillator and turn OFF the output pass transistor. A digital low level will turn the output ON. If the shutdown feature of the device is not used, Pin 4 should be tied to the ground pin of the device. MAXIMUM OUTPUT VOLTAGE Maximum unregulated output voltage can be obtained by connecting the sense pin to ground instead of the VOUT pin as shown in Figure 19. Under this condition, the magnitude of the unregulated output voltage depends on the load current. VOUT is inversely proportional to the load current as shown on the graph in Figure 19.
-5.0
VOUT -3.0V C3 4.7F L1 10H C4 4.7F
C1 4.7F
1
C2 4.7F
3
ADP3604
5 4 2
SENSE INPUT
VOUT - Volts
Figure 17. Circuit with Improved Output Ripple & Noise Voltage
Table III. Recommended Components for Circuit in Figure 17
VIN = 5.0V
8 7
-4.0
1
ADP3604
3 4 2
5
Component C2 C1, C3, C4 L1
Manufacturer/Type Sprague, 293D475X0035D2W TOKIN, 1E475ZY5U-C205-F Coiltronics, CTX32CT
-3.0 10 30 50 70 LOAD CURRENT - mA 90
EXTERNAL INPUT FILTERING
If the ADP3604 is supplied from an high-impedance source, connect an additional bypass capacitor from V+ to ground. Low-ESR capacitors of up to 100 F give best results. Place external capacitors close to the supply pins of the device with the ground connection made as close to the device ground as possible. The same ground point should be used for the output bypass capacitor. Smaller bypass capacitors can be used in conjunction with a -LC filter.
VIN +4.5 - +6V C1 4.7F L1 1H
8 7
Figure 19. Maximum Unregulated Output Voltage
Under light loads, 30 mA < ILOAD, a regulated output voltage between -3.0 V to -VIN V is possible by inserting a resistor between the sense pin and the VOUT pin as shown in Figure 20. The output voltage is approximated using the following formula:
VOUT = -(3 +R/5)
where VOUT is in volts and R is in ks.
-5.0
R = 10k
VOUT -3.0V
VOUT - Volts
C2 4.7F C3 4.7F
1
L2 C4 10H 4.7F
C5 4.7F
ADP3604
3 5 4 2
-4.0 R = 5k
VIN = 5.0V
8 1 7
SENSE INPUT
VOUT
ADP3604
5 4 2
R
3
Figure 18. Circuit with Reduced Input and Output Ripple & Noise Voltage
-3.0 10 30
50 70 LOAD CURRENT - mA
90
110
Figure 20. Maximum Regulated Output Voltage
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ADP3604
POWER DISSIPATION Table V. Recommended Components for Circuit in Figure 21
The power dissipation of the ADP3604 circuit must be limited such that the junction temperature of the device does not exceed the maximum junction temperature rating. Power is dissipated in two components, power loss due to voltage drops in the switches, and the power loss due to MOSFET drive current losses. Total power dissipation is calculated: P (VIN - |VOUT|)(IOUT) + (VIN)(IS) where both VIN and VOUT are referred to ground pin of the ADP3604. For example: Assuming the worst case conditions, VIN = 5.5 V, VOUT = -2.8 V, and IOUT = 120 mA, calculated power dissipation is: P (5.5 V-|-2.8 V|)(0.12) + (5.5 V)(0.003 A) = 341 mW This is far below the power dissipation capability of the ADP3604 package which is 660 mW.
LAYOUT AND GROUNDING TIPS
Component C3 C1, C2, C4, C5 L1 L2
Manufacturer/Type Sprague, 293D475X0035D2W TOKIN, 1E475ZY5UC205F Coiltronics, CTX32CT-1R0 Coiltronics, CTX32CT-100
FILTERED INPUT
INPUT
OUTPUT FILTERED OUTPUT SHDN OUTPUT GND
The ADP3604 switches turn on and off very fast. Good PC board layout practices will ensure the proper operation of the device. Important layout considerations include: Use adequate ground and power traces or planes. Keep components as close as possible to the device. Use short trace lengths from the input and output capacitors to the input and output pins respectively. Use single point ground for the device ground pins and the input and output capacitors. Improper layouts will result in poor load regulation, especially with heavy loads.
Figure 22. Eight-Pin SOIC Layout, Wiring Connection
C1 L1 C2 C3 L2 C4 C5
APPLICATIONS
ADP3604 EVALUATION BOARD LAYOUT
The ADP3604 evaluation board is a general purpose circuit board. Its flexible design allows the user to optimize the circuit performance by external components selection and circuit configuration. The circuit board can be configured as a basic charge pump voltage inverter with one pump capacitor and two bypass capacitors or as a more complex circuit with input and output LC filters. PC layout is designed for surface mount components and can be easily configured for through hole components as well.
VIN +4.5 - +6V C1 4.7F L1 1H
8 7
Figure 23. Eight-Pin SOIC-Layout, Component Placement Diagram (1x Scale)
VOUT -3.0V C2 4.7F C3 4.7F L2 C4 10H 4.7F C5 4.7F
1
ADP3604
3 5 4 2
SENSE INPUT
Figure 21. Evaluation Board Circuit Diagram
Figure 24. Eight-Pin-SOIC Layout, Component Side (1x Layout)
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-7-
ADP3604
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin SOIC (SO-8)
C2170-12-9/96
0.0196 (0.50) x 45 0.0099 (0.25) 8 0 0.0500 (1.27) 0.0160 (0.41)
0.1968 (5.00) 0.1890 (4.80)
8 1 5 4
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
SEATING PLANE
0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC
0.0098 (0.25) 0.0075 (0.19)
-8-
REV. 0
PRINTED IN U.S.A.

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